Ваш надійний помічник
- Experience with HDL (Verilog / VHDL) from 1,5 years;
- At least 1 year of expertise with C;
- University degree in technical sciences;
- English language skills: Intermediate level or higher.
- Official employment or private entrepreneurship;
- Flexible working hours;
- Medical insurance (extended package);
- Paid sick leave and vacation (28 paid + 15 unpaid days);
- Free lunches;
- Free English courses;
- Career and professional development;
- External trainers (the best representatives of the IT sector in the country);
- Permanent discount on gym / pool membership;
- Convenient office location (Kyiv);
- Good working place with the most up-to-date equipment;
- Regular salary review and financial bonuses (up to 100% of the salary);
- Financial support for non-resident candidates;
- Bonuses for wedding, birth of children and other significant events;
- Tea, coffee, water, snacks;
- Bicycle parking.
Please, send your CV marked «Verilog Developer» in the subject via e-mail:
Tel.: (044) 228-7271
Підписатись на розсилку нових вакансій: "Verilog Developer в Києві"